1. Field of the Invention
The present invention relates to a method for manufacturing active matrix liquid crystal displays (AMLCDs), and more particularly to a method for manufacturing AMLCDs which can prevent disconnection of signal lines and short circuit by improving the step coverage of the liquid crystal displays (LCDs) having a layered structure.
2. Description of the Related Art
In conventional AMLCDs, switching devices having integrated active elements such as thin film transistors (TFTs) are used to drive and control pixels in the LCDs. As shown in FIG. 1, a conventional LCD with TFT arrays has rectangular pixel electrodes 12 arrayed in rows and columns on a transparent substrate 11. Each of gate lines (address lines) 13 is formed between the rows of the pixel electrodes 12, and each of source lines (data lines) 14 is formed between the columns of the pixel electrodes 12. The TFTs 15 are electrically connected with the gate lines 13 and source lines 14, in the vicinity of an intersection between the gate lines 13 and the source lines 14.
FIG. 2A shows a plan view of a part of liquid crystal display elements of the conventional LCD, and FIG. 2B shows a sectional view taken along line 2B--2B in FIG. 2A.
Referring to FIGS. 2A and 2B, the conventional LCD includes a TFT array, a gate line 13 and a gate electrode 13a formed on a transparent glass substrate 11. An insulating layer 21 is formed to cover the gate electrode 13a and a gate bus line 13b formed on the transparent substrate 11. A source line 14 is formed across the gate line 13 on the insulating layer 21. Near each crossing point where the gate and source lines 13 and 14 cross each other, an intrinsic semiconductor layer 16 is formed on the gate electrode 13a branched out of the gate line 13. The insulating layer 21 is formed between the semiconductor layer 16 and the gate electrode 13a. A source electrode 14a which is branched out from the source bus line 14 is formed on a portion of the intrinsic semiconductor layer 16 over one side of the gate electrode 13a. A drain electrode 17 is formed over another side of the gate electrode 13a, opposite the source electrode 14a. In this manner, the TFTs having non-linear active elements are formed, in which the source and drain electrodes respond in accordance with the charges applied to the corresponding gate electrode.
An n.sup.+ semiconductor layer 22 is formed on the intrinsic semiconductor layer 16, and the source electrode 14a and the drain electrode 17, both made of metal, are formed thereon. The source and drain electrodes 14a and 17, respectively, are ohmic-contacted with the impure semiconductor layer 22.
In the TFT, as shown in FIG. 2B, the drain electrode 17 having an ohmic contact with the n+ semiconductor layer 22 is electrically connected with a pixel electrode 12 through a contact hole 19 formed in an insulating passivation layer 25. Basically, such a TFT includes the gate electrode 13a, the insulating layer 21, the intrinsic semiconductor layer 16, the impure semiconductor layer 22, the drain electrode 17 and the source electrode 14a. All of them are formed by repeating the steps of thin film-depositing, exposing and developing photo-resist by using masks and etching.
The aforementioned conventional AMLCD has a layered structure, in which each element thereof is formed of a thin layer. As the thin layers are piled up, overlapping portions are formed at each crossing area where the gate and source lines cross, and at areas where the drain electrodes are connected with the pixel electrodes on the TFTs arranged in rows and columns on the substrate.
Generally, a shape of one layer affects the shape of any other layer formed thereon. For example, if the shape of a first formed layer has a reversed taper and/or a shoulder, a second thin layer formed thereon will replicate the formed layer. That is, when a first metal layer has a reversed taper portion and/or a shoulder, an insulating layer formed thereon will replicate the formed layer in manufacturing an LCD. Consequently, any metal layer formed on such insulating layer has disconnected lines or short circuit problems.
These problems frequently occur when a thin film is formed with metals (e.g., Cr) which are hard to etch into a predetermined pattern, e.g., a tapering shape, or when a dry-etching method is used in the patterning process. In other words, the shape of a taper in a metal layer from which a drain electrode is formed determines the shape of an insulating passivation layer formed on the drain electrode, and affects the shape of a pixel electrode formed on the insulating passivation layer. The insulating passivation layer can have a desired shape only when the taper of the metal layer has a desired shape. Further, disconnection in the pixel electrode, resulting from a level difference (steps) within the drain electrode, can be prevented if the insulating passivation layer has a desired shape.
In the case where a metal layer for the drain electrode 17 is etched in a reverse-tapered shape (FIG. 3B), the insulating passivation layer 25 is formed with a shoulder 27 or possibly with a crack. Then the thin pixel electrode 12 is either disconnected or cannot be formed in a desired shape on the shoulder 27 or the crack. Moreover, when the insulating passivation layer 25 has cracks, etchant flows into the drain electrode 17 through the cracks and easily disconnects the drain electrode 17 during the etching step for forming the pixel electrode.
FIG. 3A shows an example of a disconnected line resulting from the above-mentioned shoulders or cracks and FIG. 3B shows a cross-sectional view taken along line 3B--3B of FIG. 3A.
As shown in FIGS. 3A and 3B, the drain electrode 17 has a reverse-tapered end. The insulating passivation layer 25 formed on the drain electrode 17 has a shoulder 27, and the pixel electrode 12 on the passivation layer 25 is disconnected where the step is formed in the passivation layer 25. This results in malfunctions and unreliable signal processing.
Therefore, in a layered structure, a good step-coverage is required for stable processing and for obtaining good manufacturing yield. However, it is very difficult to develop and manage a process for shaping a metal layer in a desired manner, after the metal layer is etched. It is also difficult to etch a thin layer made of a metal, such as Cr, to have a fine taper. Similarly, thin layers formed using a dry-etching method cause the layers to be disconnected or cause the layers to form cracks in other thin layers formed thereon. These and other problems arising from the conventional methods decrease yield in manufacturing semiconductor devices such as TFTs.